发明名称 |
VIDEO DECODER |
摘要 |
<p>PURPOSE: To reduce the memory capacity in the video decode system in compliance with the MPEG standards by quickening the decoding processing of a B picture. CONSTITUTION: A timing generating section 12 is provided with a timing selection circuit 121 selectively generating either a timing signal K for P picture decoding processing or a timing signal KB executed within a prescribed decoding processing time for B picture decoding processing in response to the supply of an image type signal PT.</p> |
申请公布号 |
JPH08256331(A) |
申请公布日期 |
1996.10.01 |
申请号 |
JP19950057844 |
申请日期 |
1995.03.17 |
申请人 |
NEC CORP |
发明人 |
KIUCHI AKINORI;SAWADA AKIRA |
分类号 |
H04N5/92;G06T9/00;H04N5/937;H04N19/00;H04N19/423;H04N19/426;H04N19/44;H04N19/625;H04N19/85;H04N19/91;(IPC1-7):H04N7/24 |
主分类号 |
H04N5/92 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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