发明名称 SYNCHRONOUS CLOCK SWITCHING DEVICE
摘要 PURPOSE: To prevent the quality deterioration of a transmission line by decoding the synchronous message codes, outputting the monitoring result, and also selecting a clock of the prescribed quality through a clock monitor part. CONSTITUTION: A selector 18 is prepared at the output side of both line data generation parts 10 and 20, and the output data on a coding part 16 of the part 10 are given to the selector 18 together with the data on the part 16 of the part 20. A CPU 1 simultaneously receives the data on both parts 16 and decides the normal states of both parts 10 and 20 to give the selection signals to them. Under such conditions, the CPU 1 selects the output of one of both parts 16 and sends it to the counter station. At the same time, the monitoring result is given to the CPU 1 from a clock monitor part 35. The part 35 extracts the data obtained from a line clock 31 at a data extraction part 351. Then the part 35 decodes the synchronous message codes contained in the extracted data and compares the quality order corresponding to the contents with that corresponding to a reference clock to select the order of higher quality.
申请公布号 JPH08256136(A) 申请公布日期 1996.10.01
申请号 JP19950059222 申请日期 1995.03.17
申请人 FUJITSU LTD 发明人 KOSUGI TORU;TAKI NOBUTAKA
分类号 H03K5/19;H04B7/14;H04B7/26;H04L1/22;H04L7/00;H04W56/00;H04W92/00 主分类号 H03K5/19
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