| 摘要 |
A semiconductor storage device of a high capacity operating at high speed includes a plurality of memory cell array blocks, each including memory cells disposed in a matrix shape of rows and columns, word lines each connected to memory cells of an associated row, a row decoder for selecting a word line, bit lines each connected to memory cells of an associated select transistor and having an input (source) electrode connected to a bit line, a column select line connected to a gate electrode of the sense amplifier select transistor, a column decoder for selecting a column select line, and data bus lines connected to output (drain) electrodes of the sense amplifier select transistors, wherein the column select lines are disposed intersecting the word lines and the data bus line, the word lines are formed by a first wiring layer, the column select lines are formed by a second wiring layer, and the data bus lines are formed by a third wiring layer. Both fine word lines and low resistance data bus lines are realized. |
