摘要 |
PURPOSE: To supply a clock for signal discrimination of high precision to a clock reproducing circuit by detecting the phase component of the clock for signal discrimination from the input/output signal of an equalizing circuit. CONSTITUTION: In a clock phase detection circuit 1A provided in a reception part, a clock reproducing circuit 12 reproduces the clock for signal discrimination to supply it to a discrimination circuit 11 for the purpose of discriminating the demodulation signal of a multilevel quadrature modulation signal in a prescribed discrimination level by the discrimination circuit 11. At this time, a clock phase detection part 14A detects the phase component of the clock for signal discrimination from the input/output signal of an equalizing circuit 13 which performs the equalization processing of the signal obtained by demodulating the multi-level quadrature modulation signal, and this phase component is supplied to the circuit 12. Thus, the phase component of the clock for signal discrimination in the circuit 12 is accurately adjusted. |