发明名称 FRAME SYNCHRONIZING CIRCUIT
摘要 PURPOSE: To avoid the complexity of a circuit accompanying the increase in throughput by eliminating the problem that a CDMA system received frame synchronizing circuit causes nondetection or misdetection of a synchronizing code in noise or multipath environment. CONSTITUTION: A path detecting circuit 11 extracts timing of each path at each symbol timing point of a received reverse spread signal and separately output it on a time base. Each timing point is regarded as a trigger point and a reverse spread signal at each timing point is stored in (n) latches 121-12n. Then 1st-(n)th path correlation arithmetic parts 141-14n are provided to perform correlation with the output of a synchronizing word register 13 at each timing of a path and output respective correlation values, which are put together by a composition part 15 and then decided by a decision circuit 16; and a frame timing detecting circuit 17 detects frame timing. A 1st path correlation arithmetic part 141 is always in processing and others are allowed to perform processing only when there is frame timing.
申请公布号 JPH08251078(A) 申请公布日期 1996.09.27
申请号 JP19950082024 申请日期 1995.03.15
申请人 KOKUSAI ELECTRIC CO LTD 发明人 ABE SHUNJI
分类号 H04B1/707;H04B1/7117;H04J13/00;H04L7/08 主分类号 H04B1/707
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