发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE: To prevent over erasing by preforming adequate erasing operation for memory cells other then memory cells (defective cells) in which erasing is slow. CONSTITUTION: When 'erasing to/from erasing verifying' is repeated in erasing operation of a memory cell array (7), a defective count circuit (10) is operated. When it is judged that the number of cells in which erasing are not yet finished (cells in which erasing is slow) are less than the prescribed numbers, by finishing erasing operation, adequate erasing operation for almost cells excluding cells of several bits in which erasing is slow can be realized, and over erasing is prevented.</p>
申请公布号 JPH08249895(A) 申请公布日期 1996.09.27
申请号 JP19950079611 申请日期 1995.03.10
申请人 NEC CORP 发明人 KATO YASUSHI
分类号 G11C17/00;G11C16/02;G11C16/34;G11C29/00;G11C29/10;G11C29/12;G11C29/52;(IPC1-7):G11C16/06 主分类号 G11C17/00
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