发明名称 |
EQUALIZER AMPLIFIER CIRCUIT |
摘要 |
PURPOSE: To establish an output voltage of a prescribed level without the need for an externally mounted adjustment component by allowing an offset compensation circuit to cancel the offset of a noninverting/inverting DC voltage so as to allow a limiter amplifier to limit an input signal of a prescribed level or over. CONSTITUTION: A limiter amplifier 7 of an equalizer amplifier circuit 1 amplifies a signal give to input terminals 3, 4, and limits the signal of a prescribed level or over. Furthermore, a peak detection circuit 9 detects the peak level of a noninverting and inverting output voltage from an output buffer section 8 and the limiter amplifier 7 to detect a DC offset component. An offset compensation circuit 10 generates the offset compensation signal by the difference from an output signal of the peak detection circuit 9 and provides its output to the output of the limiter amplifier 7. The DC offset is deceased through multi-stage connection of the equalization amplifier circuits 1 of the configuration as above and a prescribed level of an output is obtained by the limiter amplifier 78 of the equalization amplifier circuit 1 of each stage. |
申请公布号 |
JPH08250955(A) |
申请公布日期 |
1996.09.27 |
申请号 |
JP19950074684 |
申请日期 |
1995.03.08 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
HIROSE MASAKI;ISHIHARA NOBORU |
分类号 |
H03G11/00;H03F3/34;H04B3/04 |
主分类号 |
H03G11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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