| 摘要 |
PURPOSE: To make characteristics stable even if a power source or temperature varies by using the output signal of a 2nd PLL circuit, which includes the difference component between the frequency of a 2nd external signal and the internal oscillation frequency, as a pulse control signal. CONSTITUTION: A 1st PLL circuit 100 is constituted as a PLL circuit which locks the phase for a 1st external signal S1 and the 2nd PLL circuit 200 supplies a pulse control signal so as to control the pulse width of reference pulses of the circuit 100. A reference pulse generation part PA generates the reference pulses having a period a half of a signal S1 , and a phase comparison part PB compares the output of a voltage-controlled oscillator 16 with the reference pulses and outputs a comparison signal. A low-pass filter 15 passes the difference component between the output of the oscillator 16 and the frequency of the reference pulses among frequency components of the comparison signal supplied from the comparison part PB. Here, the output signal of the circuit 200 which includes the difference component between the frequency of the 2nd external signal S2 and the internal oscillation frequency is used as a pulse width control signal to facilitate the setting of a delay quantity. |
