SINGLE-ETCH STOP PROCESS FOR THE MANUFACTURE OF SILICON-ON-INSULATOR WAFERS

摘要

A single-etch stop process for the manufacture of silicon-on-insulator wafers. The process includes forming a silicon-on-insulator bonded wafers comprising a substrate layer (26), an oxide layer (28), a device layer (22), and a device wafer (20). The device layer (22) is situated between the device wafer (20) and the oxide layer (28) and the oxide layer (28) is between the device layer (22) and the substrate layer (26). The device wafer (20) has a p<+> or n<+> conductivity type and a resistivity ranging from about 0.005 ohm-cm to about 0.1 ohm-cm. A portion of the device wafer (20) is removed from the silicon-on-insulator bonded wafers and the remaining portion of the device wafer (20) has a defect-free surface after such removal. The remaining portion of the device wafer (20) is then etched to expose the device layer (22).