BIT SYNCHRONOUS DEVICE

摘要

The bit synchronization device is for arranging a phase differecne between an input clock and a reference clock and for absorbing jitter phenomenon to achieve the bit synchronization to the reference clock. A serial-to-parallel converter(11) latches the data with the input clock. A latch part(12) latches the parallel data latched by the input data by the reference clock to be synchronized to the reference clock and then absorbs th phase difference between the input clocks and the phase difference due to jitter phenomenon as much as the parallel conversion. A timing controller and phase difference detecting block generates a control part for the latch block and detects the phase difference to absorb jitter.