发明名称 Inrush current limiter
摘要 A method and apparatus for preventing current inrush upon the application of power to a load includes the steps of applying a first increasing DC voltage from a voltage source to the load through a single signal path which includes a transistor having a control electrode coupled to the voltage source and a second electrode coupled to the load. The transistor has a first operating region with an ON resistance characteristic which decreases between first and second applied control voltages. The transistor has a second operating mode in which the transistor has a relatively low on resistance RON. The transistor is thus disposed in the single signal path to both limit inrush current and to provide a low loss signal path between the voltage source and the load.
申请公布号 US5559660(A) 申请公布日期 1996.09.24
申请号 US19940215895 申请日期 1994.03.22
申请人 EMC CORPORATION 发明人 WATSON, DONALD R.;HEYDEN, CHRISTOPHER A.
分类号 H02H9/02;H02H9/00;(IPC1-7):H02H9/00 主分类号 H02H9/02
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