HIGH SPEED NETWORK SWITCH

摘要

The present invention provides an improvement in circuit switching for a network comprising a switching apparatus (100) including a plurality of transceivers (104) for interfacing directly with a like plurality of nodes (102). Each of the transceivers (104) has a receive (112) and transmit (110) through port links for passing data to and from nodes. Transmitted data includes a connect/disconnect sequence, a first wait sequence, and user data. The switching apparatus (100) further includes circuitry for isolating each transceiver (104) so as to loop back data when not in use and a switching matrix (106) for directly connecting any pair of transceivers (104). Each of the transceivers (104) includes circuitry for detecting a connect and disconnect sequence and an interface for connection to a serial asynchronous receiver (T/R O) to derive node requests, routing data, priority and other information from the connect sequence detected at the transceiver (104). Derived switch configuration requests are processed by a node route control state machine, with each node route control state machine integrated in a bus architecture for configuring the matrix switch (106). A bus arbitration state machine controls the bus architecture servicing bus requests and providing bus grants for the transfer of routing information to switch control logic and a command sequencer. The requesting node (102) may set a priority for a connection request, queue a connection request or alternatively request data from the switch controller (114) micro controller core.