CMOS CIRCUITRY WITH SHORTENED P-CHANNEL LENGTH ON ULTRATHIN SILICON ON INSULATOR
摘要
An integrated circuit comprising an insulating substrate; a layer of silicon formed on said insulating substrate; a p-channel transistor and an n-channel transistor formed in said silicon layer and interconnected in a CMOS circuit; wherein the ratio of transistor p-channel length to transistor n-channel length in the CMOS circuit is less than or equal to one.
申请公布号
WO9628849(A1)
申请公布日期
1996.09.19
申请号
WO1996US03022
申请日期
1996.03.06
申请人
PEREGRINE SEMICONDUCTOR CORPORATION
发明人
STAAB, DAVID, R.;GREENE, RICHARD, M.;BURGENER, MARK, L.;REEDY, RONALD, E.