| 摘要 |
<p>PURPOSE:To secure the steady generation of the jitter of a large amplitude by using the fixed oscillator and the digital circuit fot the constitution and converting the modulation signal into the digital signal to control the output of the fixed oscillator in a digital way. CONSTITUTION:Control circuit 24 supplies the control clock featuring the integer (M)-multiplied frequency compared with the input clock frequency through the fixed oscillator to produce the M-phase clocks featuring the phases shifted by 2pi/ Mrad to each other. Thus, the phase modulation of + or -2pi/Mrad is given to each clock pulse in corredpondence to the encoded signal given from DELTAM encoder 23. In other words, the output clock added with the jitter of + or -2pi/Mrad is generated to be applied to reading address counter 21 and encoder 23. Thus, counter 21 produces the reading address based on the output clock to apply it to elastic store 19, and the data added with the jitter is delivered 15 from store 19.</p> |
