发明名称 DYNAMIC TYPE SEMICONDUCTOR MEMORY
摘要 PURPOSE: To perform stable refresh operation even if leakage is caused from a bias nodal point, in a DRAM having such constitution that a bias circuit is intermittently operated in a self refresh mode and a current is reduced. CONSTITUTION: When one shot signal appears in a refresh indicating signalϕ3 during a self refresh mode period. First, only a bias means activating signalϕA is made ENABLE, and a power supply group circuits are activated. Next, after a detecting circuit output signalϕB of substrate bias voltage is made NON-ENABLE, that is, after the substrate bias voltage reaches the prescribed value,ϕRAS being an internal RAS signal is generated and refresh is performed. Since substrate bias voltage at the time of refresh is surely made the prescribed value, a delay time of a delay circuit never be mismatch.
申请公布号 JPH08241587(A) 申请公布日期 1996.09.17
申请号 JP19950068697 申请日期 1995.03.02
申请人 NEC CORP 发明人 TSUKADA SHUICHI
分类号 G11C11/406;G11C11/403;G11C11/407;G11C11/408;(IPC1-7):G11C11/406 主分类号 G11C11/406
代理机构 代理人
主权项
地址