Semiconductor memory device with function of carrying out logic judgement for correct recognition of memory operation

摘要

A semiconductor memory device includes: a memory cell array having a plurality of word lines; a decoder circuit for decoding an address signal to thereby generate a word line activation signal for driving a corresponding one of the plurality of word lines; a data compression circuit for carrying out a comparison between each data bit, read from the memory cell array in a test mode, of a plurality of memory cells connected to an identical word line, and compressing the result of the comparison to thereby output a logic judgement result; and an output control circuit responsive to an external test mode activation signal and the word line activation signal from the decoder circuit, for controlling the data compression circuit to output the logic judgement result based on the comparison result. When the logic judgement result of the data compression circuit indicates coincidence where the word line activation signal is not output from the decoder circuit, the output control circuit controls the logic judgement result to indicate non-coincidence. It is thus possible to correctly carry out a logic judgement for recognition of whether or not the memory can carry out a normal operation. It is also possible to reduce the test time for the memory device.