发明名称 INTER-FRAME BAND COMPRESSION SIGNAL SWITCHING CIRCUIT
摘要 <p>PURPOSE: To attain a switched image of high quality by outputting only the valid signal for which an intra-frame coding processing is performed once without outputting the image by a difference signal when plural inter-frame band compression signals are switched. CONSTITUTION: When an inter-frame coding processing is executed, both of switches 24 and 25 are turned on. Therefore, the signal corresponding to the difference of an input video signal and the video signal before the one frame is obtained from a subtraction circuit 12. This difference signal is inputted in a DCT circuit 14, the signal is converted from a time base area to a frequency axis area and the signal is quantized in a quantization circuit 15. Because the difference signal and the video signal are added in an addition circuit 21 and are inputted in a frame delay circuit 22, the predictive video signal predicting the input video signal to be the base for preparing the difference signal is prepared and is inputted. By continuously outputting the valid block of the signal for which the intra-frame processing is performed once as a matter of practice the excellent image quality is obtained at the time of switching signals.</p>
申请公布号 JPH08237599(A) 申请公布日期 1996.09.13
申请号 JP19950035693 申请日期 1995.02.23
申请人 TOSHIBA CORP 发明人 NIIMURA KAZUHARU;KUBO YUMIKO
分类号 H04N5/92;G06T9/00;H03M7/40;H04N9/804;H04N9/808;H04N11/04;H04N19/102;H04N19/107;H04N19/126;H04N19/134;H04N19/137;H04N19/142;H04N19/15;H04N19/152;H04N19/162;H04N19/174;H04N19/176;H04N19/186;H04N19/196;H04N19/423;H04N19/46;H04N19/50;H04N19/503;H04N19/51;H04N19/593;H04N19/61;H04N19/625;H04N19/65;H04N19/70;H04N19/85;H04N19/87;H04N19/91;H04N19/93;(IPC1-7):H04N5/92;H04N7/32 主分类号 H04N5/92
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