发明名称 CPU OPERATION ABNORMALITY DETECTION SYSTEM
摘要 PURPOSE: To provide a CPU operation abnormality detection system which can shorten the time needed for detection of such abnormality as the runaway of a CPU, etc. CONSTITUTION: The access inhibition information is generated by the execution of an initialization program that is stored in a ROM of a ROM/RAM/input- output control circuit part 20 and then written in a monitoring point memory part 1 by a memory control circuit part 2. Then the part 2 reads the access inhibition information corresponding to an execution address out of the part 1 and inputs the inhibition information to a CPU control circuit part 11 via a synthesization circuit 3.
申请公布号 JPH08235026(A) 申请公布日期 1996.09.13
申请号 JP19950041133 申请日期 1995.03.01
申请人 NEC CORP 发明人 FUJIZU TADASHI
分类号 G06F12/14;G06F11/30;(IPC1-7):G06F11/30 主分类号 G06F12/14
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