发明名称 BIT PHASE DETECTION CIRCUIT AND BIT PHASE SYNCHRONIZATION CIRCUIT
摘要 PURPOSE: To detect instantaneously whether or not an edge of a clock signal is located in the vicinity of a change point of a received data signal. CONSTITUTION: An EXOR circuit 6 compares a level of a signal DF2 obtained by receiving a received data signal D0 at a DFF circuit 4 with a clock signal CK and a level of signal DF1 obtained by receiving the delayed signal D0 delayed by a delay circuit 3 at a DFF circuit 5 with the clock signal CK. The propriety of the phase relation between the data signal and the clock signal is detected based on the result of the comparison.
申请公布号 JPH08237104(A) 申请公布日期 1996.09.13
申请号 JP19950058254 申请日期 1995.02.23
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 KAWANO RYUSUKE
分类号 H03K19/0175;H03L7/095;H04L7/033;H04L27/22 主分类号 H03K19/0175
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