| 摘要 |
PURPOSE: To fast generate a partial product by inverting a digit signal by a signal showing that the partial product is negative at a Booth selector part and in parallel to the generation of a signal showing the single multiplication of a multiplicand and also a signal showing the double multiplication of the multiplicand respectively. CONSTITUTION: A bit Xj-1 that is set lower than a multiplicand X toy one digit is outputted as it is when a signal NEG is equal to 0 and then outputted after inversion when the signal NEG is equal to 1. A signal of bit Nxj is outputted as it is when a signal S is equal to 1, and a signal of bit Nxj-1 that is shifted to the higher order side by one digit and received from a gate 11 is outputted when a signal&nal D is equal to 1. Then a signal Pj that is equal to 0 is outputted when S=D=0 is satisfied. As the LSB of 2X is always equal to 0 when the multiplicand X is doubled, the signal NEG is outputted as it is through toe gate 11. Then Pn=0 is defined asgainst S=D=0, and Pn=NEG is outputted in other cases. In such a way, a digit signal is inverted by the signal NEG at a Booth selector part, and this inverting time is not included in the delay of a critical path. |
