| 摘要 |
PURPOSE: To halves the size of a BTB entry in a branch estimation system using a BTB. CONSTITUTION: A lower order part (about 10 bits) of a branching destination address that is obtained when a branching destination generator 5 carries out a branch instruction is registered and updated in a BTB 3 as an estimated index. At an instruction fetching stage, a linking unit 7 links an estimated index signal S1 read out of the BTB 3 to a PC output signal SA which secures a lower order part (several bits) of a branch instruction address to generate and output an estimated branching destination address signal S2. A comparator 8 compares a branching destination address signal SC with the signals S2 and outputs a signal S4 which decides the coincidence or non-coincidence between both signals SC and S2. A branch estimation hit deciding unit 10 performs the comparison between an execution result signal S5 and an estimated direction signal S3 and decides the miss/hit state of the branch estimation based on the result of the signal S4. |
