发明名称 VECTOR CHARACTER DEVELOPMENT DMA CIRCUIT
摘要 PURPOSE: To attain a high speed for a vector character development and to increase a bus utilization efficiency by DMA(direct memory access) transferring set data, etc., to be processed at a high speed en bloc, and data other than these taking longer to be processed by one or a plurality. CONSTITUTION: A DMA circuit 3 obtains a bus for set data of data set in a memory and DMA transfers these set data en bloc to a vector character development circuit 2. Then, coordinate data (or coordinate data and attribute data) of the data are DMA transferred to the character development circuit 2 one by one. After the DMA circuit 3 obtains the bus for the set data of the data set in the memory and DMA transfers these set data to the vector character development circuit 2, the coordinate data (or coordinate data and attribute data) of the data are DMA transferred to a buffer incorporated in the vector character development circuit 2 to be stored therein by a plurality.
申请公布号 JPH08234721(A) 申请公布日期 1996.09.13
申请号 JP19950035526 申请日期 1995.02.23
申请人 FUJITSU LTD 发明人 ISOMURA HIROSHI
分类号 G06F13/28;G06T11/20;G09G5/24;(IPC1-7):G09G5/24 主分类号 G06F13/28
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