SEMICONDUCTOR STORAGE DEVICE

摘要

PURPOSE: To easily connect a main bit line with a source/drain region of a selected transistor without increasing a chip area in a DRAM having a hierarchical bit line structure. CONSTITUTION: A contact hole 30 is formed on a source/drain region 22 common to selected transistors Qb12 and Qa13, on which hole an intermediate pad 32 is formed. The intermediate pad 32 is formed in the same layer as that of a storage node 34. A main bit line MBL1 is connected with the intermediate pad 32 through a contact hole 36. A pair of the main bit lines are desired to be twisted.