发明名称 Method and apparatus for redundancy word line replacement in a semiconductor memory device
摘要 A method and apparatus for redundancy word line replacement in a semiconductor device involves generating a control signal which causes the data on the data lines to be flipped when the bit pattern of the memory cells coupled to a redundant word line are complementary to the bit pattern of the memory cells of a defective word line which is being replaced by the redundant word line. During both read and write operations, a data flip control signal is input to a data flip circuit to control the state of the bit information.
申请公布号 US5555212(A) 申请公布日期 1996.09.10
申请号 US19940306438 申请日期 1994.09.19
申请人 KABUSHIKI KAISHA TOSHIBA;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 TOSHIAKI, KIRIHATA;DAISUKE, KATO
分类号 G01R31/28;G11C11/401;G11C29/00;G11C29/04;(IPC1-7):G11C7/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址