发明名称 |
CODING METHOD AND APPARATUS FOR PIPELINED AND PARALLEL PROCESSING |
摘要 |
For encoding a stream of k-bit data bytes into a stream of m-bit code bytes satisfying given constraints, a coding principle and coder apparatus are disclosed which allow pipelined and parallel handling of the byte stream. Each data byte DB and an associated coder state indicator S are together converted into a code byte CB. The coder state indicator S(i) to be associated with a databyte DB(i) is obtained by logically combining the coder state indicator S(i-1) of the preceding data byte DB(i-1) and a state transition indicator T(i-1) derived from the latter. This allows the simultaneous generation of all coder state indicators S for a whole group (a word) of data bytes thereby enabling the parallel and pipelined operation of the coder.
|
申请公布号 |
CA2046953(C) |
申请公布日期 |
1996.09.10 |
申请号 |
CA19912046953 |
申请日期 |
1991.07.12 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CIDECIYAN, ROY DARON;ZURFLUH, ERWIN ALEXANDER |
分类号 |
H03M7/14;G11B20/14;H03M5/14;H03M7/46;H04L25/49;(IPC1-7):H03M13/02 |
主分类号 |
H03M7/14 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|