发明名称 Planarizing by polishing techniques for fabricating semiconductor devices based on CMOS structures
摘要 Methods of planarizing one or more layers having an irregular top surface topology in a semiconductor device based on an underlying MOS structure are disclosed. Methods of creating doped wells or regions for the underlying MOS structure are also disclosed, using thick oxide growths on the surface of the substrate to mask implantation of ions into, the wells. A technique for creating a pair of adjacent complementary oppositely-doped wells, such as for a CMOS structure, using a thick oxide growths as a mask is also disclosed. One of the methods of planarizing the one or more layers involves depositing, densifying and re-flowing a layer of glass on top of the topological layer. Another method of planarizing the one or more layers involves depositing, densifying and chemical-mechanically polishing the deposited and densified glass, thereby avoiding an additional temperature cycle (i.e., for re-flowing the glass) which would adversely affect underlying diffusions.
申请公布号 US5554555(A) 申请公布日期 1996.09.10
申请号 US19940353897 申请日期 1994.12.12
申请人 LSI LOGIC CORPORATION 发明人 ROSTOKER, MICHAEL D.;PASCH, NICHOLAS F.
分类号 H01L21/266;H01L21/3105;H01L21/8238;(IPC1-7):H01L21/00 主分类号 H01L21/266
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