发明名称 |
Correction d'erreurs dans une mémoire. |
摘要 |
Static memory comprising memory cells (MC) arranged in rows and columns, each row of cells constituting of at least one word and a corresponding error control code. Each cell column comprises at least one specific power line (Vcc', GND') connected to a general power line (Vcc', GND') of the memory through a current detector (10, 12). Each detector activates an error signal if the associated specific supply line current exceeds a predetermined threshhold. |
申请公布号 |
FR2721135(B1) |
申请公布日期 |
1996.09.06 |
申请号 |
FR19940007497 |
申请日期 |
1994.06.14 |
申请人 |
CENTRE NAL RECHERC SCIENTIFIQUE |
发明人 |
NICOLAIDIS MICHAEL;VARGAS FABIAN |
分类号 |
G06F11/00;G06F11/10;G11C29/50;(IPC1-7):G11C29/00;G11C7/02 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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