发明名称 CIRCUIT ELEMENT FOR COMMUNICATION PROCESSING
摘要 <p>PURPOSE: To provide a highly versatile terminal processor by providing a pair of input/output terminals for transmitting and receiving data and plural terminals connected in parallel to a shift register and switching the input/output directions of the plural terminals. CONSTITUTION: This element is provided with a pair of the input/output terminals 64 and 66 for transmitting and receiving the data and the plural terminals 71-84 connected in parallel to the shift register 104. Terminal pins 85 and 86 are added for the input of mode selection signals and an abnormality detection circuit 305 monitors reception signals RXD inputted through the pin 64. For selection by mode selection input, when mode selection is set to 1, 1 at an address 0 for instance, the CIM is operated in an AD mode, both input number and output number become 5 for an I/O buffer 105 and an automatic transmission function is not imparted. Thus, just by adding only two pins 85 and 86, the selection of many functions is made possible and the CIM provided with the multiple functions is easily made into an LSI.</p>
申请公布号 JPH08228196(A) 申请公布日期 1996.09.03
申请号 JP19950292864 申请日期 1995.11.10
申请人 HITACHI LTD 发明人 HAMANO FUMIO;OBO SHIGERU;HIRAYAMA TAKESHI;HASEGAWA AKIRA
分类号 B60R16/023;B60R16/02;G06F5/00;H04J3/00;H04L12/28;H04L12/44;(IPC1-7):H04L12/28 主分类号 B60R16/023
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