| 摘要 |
An integrated circuit dynamic memory is described which shares a p-sense amplifier between two memory arrays. More specifically, a dynamic random access memory (DRAM) is disclosed which uses n-channel depletion transistors to couple the shared p-sense amplifier to two memory arrays. The depletion transistors use a gate voltage equal to the power supply potential to perform a complete write-back operation on one memory array and use a negative potential to isolate the p-sense amp from the other memory array.
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