发明名称 MPEG VIDEO DECODER PROVIDED WITH HIGH BAND WIDTH MEMORY
摘要 PURPOSE: To perform operations with different kinds of formats and to decode main profile high level data by making access memory by using a parallel decoding pass. CONSTITUTION: The parallel decoding pass of an MPEG-2 decoder 110 is provided with VLDs 118, 122, inverse quantization processors 134, 138 and inverse discrete cosine transform processors 142, 146. A data stream generated by the decoding pass is processed by motion compensation processing circuits 158, 160 and 166, and a single timewisely multiplexed stream for the block of a decoded picture element is generated. The decoding pass reads/writes data on memory 120. Picture element data to express individual line of a decoded image is obtained for display by making access the memory 120 by using memory 174 and a display controller 175.
申请公布号 JPH08228349(A) 申请公布日期 1996.09.03
申请号 JP19950281051 申请日期 1995.10.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAIPURASATSUDO BUI NAINPARII;RARII FUIRITSUPUSU;SHIYUUJI INOUE;EDOUIN ROBAATO MEIYAA
分类号 G06T9/00;H03M7/30;H03M7/40;H04N5/04;H04N5/44;H04N7/26;H04N7/30;H04N7/50;H04N7/56;(IPC1-7):H04N7/24 主分类号 G06T9/00
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