发明名称 |
Method and apparatus for providing bit-rate reduction and reconstruction of image data using dither arrays |
摘要 |
An apparatus and method for providing bit-rate reduction and reconstruction of image data. Bit-rate reduction of 32-bit CMYK combinations into 16-bit code words is performed on a pixel by pixel basis by stepwise calculations or by using LUTs. Bit-rate reduction takes place during PostScript TM interpretation where the output image pixels are generated in a possibly arbitrary order. Bit expansion from 16-bit code words to 32-bit data for 8 bits per component of the CMYK image values is performed while real time printing, preferably by direct table look up. During bit-rate reduction, the image data may be non-linearly corrected to compensate for perceptual non-uniformities and for non-linearities in the input/output relationship of the reproduction device. Quantization and coding may be accomplished by thresholding the non-linearly corrected image data by values from a dither array. The coded image is stored in the frame buffer and subsequently retrieved, de-dithered, dequantized and inversely transformed for the perceptual non-linearity before printing.
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申请公布号 |
US5553200(A) |
申请公布日期 |
1996.09.03 |
申请号 |
US19950398369 |
申请日期 |
1995.03.03 |
申请人 |
ELECTRONICS FOR IMAGING, INC. |
发明人 |
ACCAD, YIGAL |
分类号 |
B41J2/52;G06F3/12;G06T5/00;H04N1/40;H04N1/405;H04N1/407;H04N1/41;H04N1/411;H04N1/46;H04N1/60;H04N1/64;(IPC1-7):H04N1/405;H04N1/413 |
主分类号 |
B41J2/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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