| 摘要 |
PROBLEM TO BE SOLVED: To provide a hardware divider exclusively for an integer dividing instruction. SOLUTION: The hardware divider generates the plural bit parts of a quotient in response to plural different dividing instruction codes. When a partial remainder is zero, following dividing instructions are not executed, and a dividing operation is immediately ended. The successive dividing instruction calculates the residual bits of the quotient in response to a zero display flag set in a present programming state register 26. This is an execution example in which a 32 bit quotient and a 32 bit remainder are generated from a 32 bit divisor and a 64 bit dividend in response to four different dividing instruction codes which respectively generates a 8 bit quotient. |
