| 摘要 |
PURPOSE: To provide a layout pattern generator which can automatically verify the ROM layout pattern data before an IC with a built-in mask ROM is produced. CONSTITUTION: A layout pattern synthesization means 7 synthesizes the ROM layout pattern data which are generated from the ROM code data by a ROM layout pattern data generation means 2 and the layout pattern data on an entire chip which are read by a layout pattern data reading means 6. Then, a logical simulation is carried out based on the net list data on an entire chip which are extracted out of the obtained ROM chip layout pattern data by a net list data extraction means 8 and the test pattern data which are read by a test pattern data reading means 9. |
