CLOCK ABNORMALITY DETECTING DEVICE

摘要

PURPOSE: To detect a glitch which a reference clock has even in a period wherein a high-level comparison timing signal and a low-level comparison timing signal are both inactive. CONSTITUTION: This device has a comparison timing signal generation part 2 which generates the high-level comparison timing signal 12 that synchronizes with the reference clock 1, has the same frequency, and also has pulse width equal to permissible minimum width of the reference clock 11 and generates and outputs the low-level comparison timing signal 13 by delaying the generated high-level comparison timing signal 12 by a half cycle of the reference clock 11 and a comparison timing OFF time abnormality detection part 4 which detects rise/fall variation regarding the reference clock 11 and outputs a comparison timing OFF time abnormality signal 15 showing abnormality regarding the reference clock 11 when a rise and a fall are both detected.