| 摘要 |
PURPOSE: To reduce the number of the signal lines of a bus to connect between a pot part and an emulator part by providing a control circuit to connect between a target microcomputer and a control microcomputer or between the target microcomputer and a debugging circuit or between the control microcomputer and a memory through a common bus. CONSTITUTION: In an interval between the pot part 1 and the emulator part 2, the target microcomputer 4 and the control microcomputer 5, or the target microcomputer 4 and the debugging circuit 6, or the control microcomputer 5 and the memory 3 are connected by the common bus 21. To this common bus 21, an emulator control circuit 26 which controls a three-state buffer 22 into an ON state, and also controls the three-state buffer 23 into an OFF state when it receives an exclusive control signal purporting that the memory 3 is accessed from the control microcomputer 5 is connected through the three- state buffers 22 to 25. Through the use of such configuration, the program becomes capable of being debugged by only providing one common bus 21. |
