| 摘要 |
<p>PURPOSE: To provide a driver circuit which can extremely reduce its power consumption for driving the capacity load and also can control the through rate without using a through current. CONSTITUTION: This driver circuit includes a power supply for target charging potential Vcc and also a power supply for potential 1/2 Vcc lower than the potential Vcc, and the supply lines of these power voltage and an output node n12, i.e., the PMOS transistors TR P11 and P12 and the NMOS TR N11 and N12 which secure the active connection of load capacity CL in response to the input levels of control signalsϕ1 toϕ4. In a charging mode, the connection and non-connection states are successively switched to the TR P12 from P11 which are connected to a power supply for lower potential (1/2) Vcc. In a discharging mode, the connection and non-connection states are successively switched to the TR N12 from N11 which are connected to a power supply for potential (1/2) Vcc higher than the ground level.</p> |
