发明名称 |
DRAM CELL ARRAY |
摘要 |
forming an active region with a diagonal pattern, forming a bit line(11) in the Y direction through a center of the active region; forming the bit line contact(12) in an alternate part of the bit line and the active region, forming a node contact(13) on two ending points of the active region, forming a capacitor on the node contact(13); forming an word line(14) of zigzag type in the X direction between the node contact(13) and the bit line contact(12).
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申请公布号 |
KR960011811(B1) |
申请公布日期 |
1996.08.30 |
申请号 |
KR19920021766 |
申请日期 |
1992.11.19 |
申请人 |
LG SEMICONDUCTOR CO., LTD. |
发明人 |
WANG, SUNG - HO;AHN, JIN - HONG |
分类号 |
H01L27/10;(IPC1-7):H01L27/10 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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