TUNNELING TECHNOLOGY FOR REDUCING INTRA-CONDUCTIVE LAYER CAPACITANCE
摘要
<p>The control speed of semiconductor circuitry is increased by forming air tunnels (41) in the interwiring spaces (2) of a conductive pattern (1) to reduce intraconductive layer capacitance.</p>
申请公布号
WO9626541(A1)
申请公布日期
1996.08.29
申请号
WO1996US00155
申请日期
1996.01.11
申请人
ADVANCED MICRO DEVICES, INC.
发明人
CHEUNG, ROBIN, W.;CHAN, SIMON, S.;HUANG, RICHARD, J.
