发明名称 SYSTEM MANAGEMENT SHADOW PORT
摘要 A device and method for transferring data, address and status information concerning a former I/O bus cycle before a system management interrupt is initiated. A plurality of system management shadow registers (22) samples information from a system bus (16). Such information is obtained by a register accessing the plurality of system management shadow registers (22) through a common shadow port.
申请公布号 WO9626488(A1) 申请公布日期 1996.08.29
申请号 WO1995US02305 申请日期 1995.02.24
申请人 INTEL CORPORATION 发明人 DATTA, SHAM;JOSHI, JAYESH;KARDACH, JAMES, P.
分类号 G06F1/32;G06F13/42;(IPC1-7):G06F13/00 主分类号 G06F1/32
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