发明名称 METHOD OF FORMING A DRAM BIT LINE CONTACT
摘要 Semiconductor memory devices and methods for forming the devices are disclosed. In one embodiment, the devices include a) a semiconductor substrate (11); b) a field effect transistor gate (14) positioned outwardly of the semiconductor substrate; c) opposing active areas (24, 26) formed within the semiconductor substrate on opposing sides of the gate; d) a capacitor electrically connected with one of the active areas; the capacitor comprising an inner storage node (36), a capacitor dielectric layer (38), and an outer cell node (40); the inner storage node electrically connecting with the one active area and physically contacting the one active area; e) a bit line (46); f) a dielectric insulating layer (44) positioned intermediate the bit line and the other active area; and g) an electrically conductive bit line plug (36, 38, 40, 39) extending through the insulating layer to contact with the other active area and electrically interconnect the bit line with the other active area. Constructions in which the bit line plug comprises an electrically conductive annular ring are also disclosed.
申请公布号 WO9626544(A1) 申请公布日期 1996.08.29
申请号 WO1996US01841 申请日期 1996.02.09
申请人 MICRON TECHNOLOGY, INC. 发明人 JOST, MARK;DENNISON, CHARLES, H.;PAREKH, KUNAL
分类号 H01L21/02;H01L21/768;H01L21/8242;H01L23/485;H01L27/105;H01L27/108 主分类号 H01L21/02
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