Parallel arithmetic-logic processing device.,申请号EP19940103612-传众专利搜索

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发明名称	Parallel arithmetic-logic processing device.
摘要
申请公布号	EP0615186(A3)	申请公布日期	1996.08.28
申请号	EP19940103612	申请日期	1994.03.09
申请人	SONY CORPORATION	发明人	SHIROTA, NORIHISA;KATO, YASUNOBU;OYA, NOBORU
分类号	G06F15/80;(IPC1-7):G06F7/00	主分类号	G06F15/80
代理机构		代理人
主权项
地址

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