发明名称 Voltage offset compensation circuit
摘要 <p>A voltage offset compensation circuit for a high gain amplifier having a fixed input voltage offset, includes sample and hold means for periodically sampling the offset voltage and gain error voltage of the amplifier, and holding the sampled voltage; storage means, operable between sampling periods, to store the sampled and held voltage; and further means, operable during the sampling periods, to continuously maintain the output of the high gain amplifier at a value that is gain error and voltage offset compensated. The voltage offset compensation circuit may be used in sampled-data circuits, or continuous-time amplifier circuits utilising either single-ended, or differential, inputs and either single-ended, or differential, outputs. &lt;IMAGE&gt;</p>
申请公布号 EP0729223(A2) 申请公布日期 1996.08.28
申请号 EP19960300822 申请日期 1996.02.07
申请人 ZARLINK SEMICONDUCTOR LIMITED 发明人 JONES, KEITH L.
分类号 H03F1/30;H03G3/00;H03F3/34;(IPC1-7):H03F1/30;H03F3/00 主分类号 H03F1/30
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