| 摘要 |
A high speed digital polarity correlator includes a shift-one-bit circuit for receiving a first array, shifting the first array, and providing a one-bit shifted array, and a correlation circuit for delivering the correlation coefficient between a second and the one-bit shifted array. The correlation circuit includes an exclusive OR circuit receiving a data byte from each of the two arrays and delivering an XOR output containing a number of same states equal to the number of time the two arrays are in agreement. The conversion unit receives the XOR output and delivers a binary representation of a number of times the two arrays have been in agreement. An adder receives the number, adds the number to an existing sum of previous agreements between the two arrays and delivers an updated sum. A latch receives the updated sum, provides the updated sum as the existing sum to the adder, and, after all data bytes in the two arrays have been examined, delivers the correlation coefficient.
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