发明名称 Region search for delay routing and signal net matching
摘要 A system and method performs signal net matching during delay routing. The delay router employs a region search for placing pseudo pins in a search region that will satisfy specified time delay constraints for a given signal net. The search region is an octagonal region defined by Manhattan detour lengths using derived wire length constraints as applied to a bounding box for the signal net. Any sequential router can be used to search the search region for free points. A first search phase finds delay paths to all free points in the search region from an arbitrary source pin. A second search phase then searches the search region for delay paths connecting a sink pin to one of the free points. Any delay path that connects the source and sink pin through a free point in the search region satisfies the time delay constraints. Dynamical routing can be implemented during the search phases as needed. Once all the signal nets have been routed, a group of signal nets to be matched is rerouted with the search region defined by the length of the longest routed path in the group. This ensures that all the signal nets in the group meet the specified time delay constraint.
申请公布号 US5550748(A) 申请公布日期 1996.08.27
申请号 US19940216157 申请日期 1994.03.22
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 XIONG, XIAO-MING
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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