发明名称 |
Method for producing semiconductor device having DMOS and NMOS elements formed in the same substrate |
摘要 |
An intelligent power element has integrated DMOS transistors and control elements such as NMOS transistors. Impurity concentration inside a channel well (4) of each DMOS transistor is denser than that at the surface thereof. This results in reducing the reach-through withstand voltage of the DMOS transistor to less than that of the NMOS transistor. As a result, a reach-through phenomenon occurs on the DMOS transistor having a higher allowable (withstand) current before it occurs on the NMOS transistor having a lower allowable current. To provide the same effect, the reach-through withstand voltage of the DMOS transistor may be decreased by forming an internal high concentration well (201) at an upper part of a deep main well (31) of the DMOS transistor. The well (201) is shallower than the main well (31) and does not extend under a gate electrode (71).
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申请公布号 |
US5550067(A) |
申请公布日期 |
1996.08.27 |
申请号 |
US19930038953 |
申请日期 |
1993.03.29 |
申请人 |
NIPPONDENSO CO., LTD. |
发明人 |
KUROYANAGI, AKIRA;TOMATSU, YUTAKA;TSUZUKI, YASUAKI |
分类号 |
H01L27/088;H01L21/8234;H01L21/8236;H01L29/06;H01L29/78;(IPC1-7):H01L21/265 |
主分类号 |
H01L27/088 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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