发明名称 Method and apparatus for transitioning between instruction sets in a processor
摘要 A data processor is described. The data processor is capable of decoding and executing the first instruction of a first instruction set and the second instruction of a second instruction set wherein the first instruction and the second instruction originate from a single computer program. Alternatively, the data processor can also execute a first instruction of a first instruction set in a first instruction set mode, receive a first interruption indication in the first instruction set mode, service the first interruption indication in a second instruction set mode, return to the first instruction set mode, receive a second interruption indication in the first instruction set mode, and service the second interruption indication in the first instruction set mode.
申请公布号 AU4775796(A) 申请公布日期 1996.08.27
申请号 AU19960047757 申请日期 1996.02.05
申请人 INTEL CORPORATION 发明人 GARY N HAMMOND;KEVIN C KAHN;DONALD B ALPERT
分类号 G06F9/30;G06F9/318;G06F9/38;G06F9/455 主分类号 G06F9/30
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