| 摘要 |
A pipelined data processing system has a jump prediction mechanism for predicting the outcomes of jump instructions. The prediction mechanism includes a jump prediction memory which provides the predictions. The jump prediction memory is addressed by a jump signature, formed by adjustably selecting bits from an address value and from a jump path value. The address value is based on the address of the jump instruction and the jump path value is based on a history of recently executed jump instructions prior to said jump instruction. A mode register is used to indicate, for each bit of the jump signature, whether that bit is to be selected from the address value or from the jump path value. Adjustment of the contents of the mode register allows fine tuning of the jump prediction mechanism to optimize performance. <IMAGE> |
