发明名称 POWER DISSIPATION CONTROL SYSTEM FOR VLSI CHIPS
摘要 <p>Chip logic (38), a phase locked loop (PLL) clocking circuit (30), a temperature sensing circuit (32), and a power management circuit (34), are integrated on a very large scale integrated (VLSI) circuit chip. The temperature sensing circuit (32) directly measures the chip temperature, producing a temperature output signal. The power management circuit (34), which is connected to the temperature sensing circuit (32) and to the chip logic (38), responds to the temperature output signal and to a functional state of the chip logic (38) to generate a control signal to the PLL (30). The PLL (30) responds to the control signal to either stop the clock signal or modify the operating frequency thereof, depending upon the state of the control signal.</p>
申请公布号 WO9625796(A1) 申请公布日期 1996.08.22
申请号 WO1995US02097 申请日期 1995.02.17
申请人 INTEL CORPORATION 发明人 BERTOLUZZI, RENITIA;JACKSON, ROBERT, T.;WEITZEL, STEPHEN, D.
分类号 H03L1/02;H03L1/04;H03L7/183;(IPC1-7):H03K5/26 主分类号 H03L1/02
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