发明名称 Verfahren zur Prüfung der Funktionsfähigkeit einer ASIC-Schaltung und darauf bezogene ASIC-Schaltung
摘要 The application-specific integrated circuit (1) comprises a central processing unit (2) and devices (3, 4, 5, 6) which are dependent on the application of the integrated circuit and are connected to the central processing unit. At least one shift register (20) is formed by connecting in series elementary cells each mounted on a respective line corresponding to a gateway of the central processing unit (2), each cell being able to inject into the said line a value entered serially through the shift register (20) and being able to sample the value of the binary signal carried by the said line with a view to reading this value out through the shift register (20). Use for testing the makeup of the application-specific integrated circuit (1) or its application program. <IMAGE>
申请公布号 DE69301632(T2) 申请公布日期 1996.08.22
申请号 DE1993601632T 申请日期 1993.06.30
申请人 SGS-THOMSON MICROELECTRONICS S.A., GENTILLY, FR 发明人 LABORIE, JEAN-LOUIS, F-38120 SAINT-EGREVE, FR
分类号 G01R31/26;G01R31/28;G01R31/3185;(IPC1-7):G06F11/26 主分类号 G01R31/26
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