发明名称 MEMORY CONTROL METHOD, MEMORY CONTROLLER FOR DISTRIBUTED COMPUTER, AND DISTRIBUTED CONTROL MONITOR SYSTEM
摘要 PURPOSE: To provide the method and device for controlling memory with which a write error generated at the memory of a distributed computer is remotely and automatically corrected. CONSTITUTION: The write data of (j) bits and its object address fetched from an NCP (network control unit) are inputted through a system bus 30 to a memory device 33. A control circuit 336 reads out respective data corresponding to the object address from a memory data area 331 and its redundant bit area 332 of (k) bits (k>j) and those data are checked by an error check circuit 333. When any error is detected, the control circuit 336 reports it to the NCP, stops write processing, receives a mode switching signal from the NCP, sets the gate circuit of a switching means 338 and inhibits the output of an error signal. Further, corrected data are fetched from the NCP into a data embedding circuit 335 and the data of object (k) bits are reloaded. Afterwards, the mode is switched to an access mode and the write processing is started again.
申请公布号 JPH08212144(A) 申请公布日期 1996.08.20
申请号 JP19950020164 申请日期 1995.02.08
申请人 HITACHI LTD;HITACHI PROCESS COMPUT ENG INC 发明人 YAMAOKA HIROMASA;KOBAYASHI MITSUAKI;KOBAYASHI MASAMITSU;OHASHI AKIHIRO;WATABE RYUICHI;ONUMA KUNIHIKO
分类号 G06F12/16;G06F13/00 主分类号 G06F12/16
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